Free Downloads Constraining Designs For Synthesis And Timing Analysis: A Practical Guide To Synopsys Design Constraints (SDC)
This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing. Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design Constraints (SDC), the industry-leading format for specifying constraints.
Hardcover: 226 pages
Publisher: Springer; 2013 edition (May 7, 2013)
Language: English
ISBN-10: 1461432685
ISBN-13: 978-1461432685
Product Dimensions: 6.1 x 0.6 x 9.2 inches
Shipping Weight: 15.2 ounces (View shipping rates and policies)
Average Customer Review: 2.5 out of 5 stars See all reviews (2 customer reviews)
Best Sellers Rank: #1,230,813 in Books (See Top 100 in Books) #98 in Books > Computers & Technology > Hardware & DIY > Mainframes & Minicomputers #388 in Books > Engineering & Transportation > Engineering > Electrical & Electronics > Circuits > Design #584 in Books > Computers & Technology > Hardware & DIY > Design & Architecture
An excellent handbook for Synopsys Design Constraints (SDC). The context in which the SDCs are typically used is nicely explained. It becomes very useful for people like me (EDA engineers) who have to understand how the designers use the Constraints in their world. Most material on SDCs are about the different options that a particular SDC has, but never explains clearly why one might use the option.
I was very disappointed with this book, considering the price. I was hoping for some more detailed real world examples. The level of detail presented can just be found with some simple google searching.
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